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更新时间：2022-08-12 20:28:49
/**************************************************************************************** * OK335xS U-boot GPIO control hacking * 声明： * 本文主要是跟踪U-boot中如何设置GPIO口电平。 * * 2015-9-26 晴 深圳 南山平山村 曾剑锋 ***************************************************************************************/ cat board/forlinx/ok335x/evm.c int board_init(void) { int c = 100; /* Configure the i2c0 pin mux */ enable_i2c0_pin_mux(); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); board_id = GP_BOARD; profile = 1; /* profile 0 is internally considered as 1 */ daughter_board_connected = 1; configure_evm_pin_mux(board_id, header.version, profile, daughter_board_connected); --+ | /** | * 1. 参考资料： | * AM335x ARM Cortex-A8 Microprocessors (MPUs) Technical Reference Manual (Rev. H) | * | * 2. ARM Cortex-A8 Memory Map | * Table 2-2. L4_WKUP Peripheral Memory Map (continued) | * +-------------+---------------------+-------------------+------+----------------+ | * | Region Name | Start Address (hex) | End Address (hex) | Size | Description | | * +-------------+---------------------+-------------------+------+----------------+ | * | GPIO0 | 0x44E0_7000 | 0x44E0_7FFF | 4KB | GPIO Registers | | * +-------------+---------------------+-------------------+------+----------------+ | * | * 3. GPIO Registers（4068 页） | * Table 25-5. GPIO REGISTERS | * +--------+-------------------+---------------+-------------------+ | * | Offset | Acronym | Register Name | Section | | * +--------+-------------------+---------------+-------------------+ | * | 134h | GPIO_OE | | Section 25.4.1.16 |<-+ | * +--------+-------------------+---------------+-------------------+ | | * | 190h | GPIO_CLEARDATAOUT | | Section 25.4.1.25 | |<-+ | * +--------+-------------------+---------------+-------------------+ | | | * | 194h | GPIO_SETDATAOUT | | Section 25.4.1.26 | | |<-+ | * +--------+-------------------+---------------+-------------------+ | | | | */ | | | | /* set gpio0_7 gpio0_12 gpio0_22 gpio0_23 output mode */ | | | | __raw_writel(~((1<<7) | (1<<12) | (1<<22) |(1<<23)), 0x44E07134);-------+ | | | /* set gpio0_7 12 19 23 low */ | | | __raw_writel((1<<7) | (1<<19) | (1<<23), 0x44E07190); ----------+ | | /* set gpio0_22 high to height */ | | __raw_writel( (1<<12) | (1<<22), 0x44E07194); -------------+ | | | #ifndef CONFIG_SPL_BUILD | board_evm_init(); | #endif | gpmc_init(); | | return 0; | } +-------------------------------------------------------------------------+ V void configure_evm_pin_mux(unsigned char dghtr_brd_id, char version[4], unsigned short profile, unsigned int daughter_board_flag) { if (dghtr_brd_id > BASE_BOARD) return; set_evm_pin_mux(am335x_evm_pin_mux[0], profile,daughter_board_flag); } | V static struct evm_pin_mux *am335x_evm_pin_mux[] = { general_purpose_evm_pin_mux, ----------------------+ }; | | /* | * Update the structure with the modules present in the general purpose | * board and the profiles in which the modules are present. | * If the module is physically present but if it is not available | * in any of the profile, then do not update it. | * For eg, nand is avialable only in the profiles 0 and 1, whereas | * UART0 is available in all the profiles. | */ | static struct evm_pin_mux general_purpose_evm_pin_mux[] = { <----------+ {i2c1_pin_mux, PROFILE_ALL & ~PROFILE_2 & ~PROFILE_4, DEV_ON_BASEBOARD}, #ifdef CONFIG_NAND {nand_pin_mux, PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3, DEV_ON_DGHTR_BRD}, #endif #ifndef CONFIG_NO_ETH {mii1_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD}, #endif #ifdef CONFIG_MMC {mmc0_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD}, #endif {backlight_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD}, -----+ {maxttl_model_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD}, | {lcd_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD}, | {uart0_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD}, | {0}, | }; | | static struct module_pin_mux backlight_pin_mux[] = { <----+ {OFFSET(ecap0_in_pwm0_out), MODE(7) | PULLUP_EN | RXACTIVE}, /* GPIO0_7 */ {OFFSET(uart1_ctsn), MODE(7) | PULLUDDIS | RXACTIVE}, /* GPIO0_ 12 */ {-1}, };