我不确定所显示的两个描述的行为是否完全相同.它们似乎是不同的实现.

Imagination的MIPS在其文档中的实现如下(采用SystemVerilog语法，假设GPR寄存器是32位):

if ({1'b0 , GPR[rs]} < {1'b0 , sign_extend(immediate)} 
   GPR[rd] = 32'h00000001;
else
   GPR[rd] = 32'h00000000;

请注意，这是一个33位比较，其中第33位为0，因此是无符号比较.

另外，请注意:

sign_extend(immediate) returns: { {16{immediate[15]}}, immediate }

这意味着立即数首先被视为一个带符号的数字，即15位值，而第16位是符号.因此:

If immediate >=0, then sign_extend(immediate) is in [0,32767]. 

另一方面，如果即时数为负数，我们将得到:

sign_extend(immediate)  = { {16{1'b1}}, 1'b1, immediate[15:0] }, which is in [32'hFFFFFFFF-32767, 32'hFFFFFFFF]

其中32'hFFFFFFFF被称为max_unsigned.

基本上，此指令使您可以在[0,32767]或[32'hFFFFFFFF-32767，32'hFFFFFFFF]中的GPR [rs]和 unsigned 数字之间执行无符号比较. /p>

第二个实现在GPR [rs]和[0,65535]之间执行无符号比较.

请注意，在SLTI和SLTIU中，立即数被符号扩展，但具有不同的用途.在SLTIU中，被比较的两个数字被强制取消单个(通过添加第33位).因此，立即数的符号扩展启用了不同的比较范围:最小的32767和最大的32767无符号值，而不是0到65535.符号扩展未出于签名比较的目的而进行，因为这可能会造成混淆.

但是，在SLTI中，即时数的符号扩展是出于不同的目的进行的:将负值与正值进行比较(有符号比较).

I am designing a MIPS processor as my individual project, by now I met a very confused question. I just can not summarize when to use signed-extend and when to use zero-extend in MIPS.

I have searched lots of resources, mostly said:

1) ADDI, ADDIU are both use signed-extend. 2) ADDI, ORI, XORI both use zero-extend.

However, In those two instruction, I am start getting confused:

SLTIU/SLTI

In the Imagination's "MIPS Architecture for Programmers Volume II-A: The MIPS instruction set Manual" page 368 says:

It clearly mentioned the 16-bit immediate is signed-extend.But I don't understand the following statement:

[0, 32767] or maximum [max_unsigned-32767, max_unsigned] end of the unsigned range.

and some other people say the 16-bit immediate is zero-extend, like this:

Well, can some one explain what exactly differences between the signed instruction and unsigned instruction in MIPS?

Thank you so much!

I'm not sure if the two descriptions that you are showing behave exactly the same. They seem to be different implementations.

The implementation of Imagination's MIPS as it appears in their document is as follows (in SystemVerilog syntax, assuming GPR regsiters are 32 bits):

if ({1'b0 , GPR[rs]} < {1'b0 , sign_extend(immediate)} 
   GPR[rd] = 32'h00000001;
else
   GPR[rd] = 32'h00000000;

Notice that this is a 33 bit comparison where the 33rd bit is 0, hence an unsigned comparison.

Also, notice that:

sign_extend(immediate) returns: { {16{immediate[15]}}, immediate }

This means immediate is first treated as a signed number, i.e., a 15 bit value and the 16th bit is the sign. Therefore:

If immediate >=0, then sign_extend(immediate) is in [0,32767]. 

On the other hand if immediate is a negative number, we will have:

sign_extend(immediate)  = { {16{1'b1}}, 1'b1, immediate[15:0] }, which is in [32'hFFFFFFFF-32767, 32'hFFFFFFFF]

where 32'hFFFFFFFF is called max_unsigned.

Basically this instruction enables you to perform an unsigned comparison between GPR[rs] and an unsigned number either in [0,32767] or [32'hFFFFFFFF-32767, 32'hFFFFFFFF].

The second implementation performs an unsigned comparison between GPR[rs] and [0,65535].

EDIT:

Note that in SLTI and SLTIU the immediate value is sign extended but with different intentions. In SLTIU, the two numbers being compared are forced to be unsinged (by adding the 33rd bit). So the sign extension of immediate enabled a different range of comparison: the 32767 smallest and the 32767 largest unsigned values as opposed to just 0 to 65535. The sign extension was not done for the purposes of signed comparison as one might be confused.

In SLTI however, the sign extension of immediate is done for a different purpose: to compare a negative value to a positive value (signed comparison).